1. Field of the Invention
The present invention relates to the field of CMOS differential amplifiers.
2. Prior Art
CMOS differential amplifiers having a multiple gain selectable by a gain control signal are well known in the art. Such amplifiers include amplifiers having a differential input pair of transistors, each with a load resistor in its drain circuit and a current source in its source circuit. The differential input is applied to the gates of the transistors and a differential output taken from the drains of the transistors. A third resistor is coupled between the sources of the transistors, with a third switching transistor coupled across the third resistor to controllably short out the resistor. With the third transistor off, the gain of the amplifier is proportional to the ratio of the resistances of the load resistors to the third resistor. With the third transistor on, effectively connecting the sources of the first and second transistors, the differential amplifier will have a high gain, dependent on the product of the transconductance of the first and second transistors.
Amplifiers of the foregoing type work well when used alone, but cannot be easily cascaded. In particular, such amplifiers amplify not only the signal, but the DC offsets also, so that if one tries to cascade multiple amplifiers for substantial gain by direct connection, the DC offsets would be amplified also, likely saturating the latter stages. AC coupling could be used between stages, but that would not only require coupling capacitors between stages, but also biasing circuits between stages to bias the gates of the next stage.